Overriding the single quote (')

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• Subject: [mg130805] Overriding the single quote (')
• From: Lawrence Walker <lwalker701 at gmail.com>
• Date: Fri, 17 May 2013 04:34:26 -0400 (EDT)
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```The Verilog "programming" language provide a compact way to describe and work with digital circuits.  The language features a nifty syntax for representing bits.  For example 3'b101 is the 3 bit unsigned binary number 101.  3'd5 is the same binary number but represented as the decimal 5.

I wanted to set up an expression in Mathematica such as f[3'b101] rather than the more verbose f["3'b101"].

I thought I could simply set f to hold all its arguments using SetAttributes[f,HoldAll].  But FullForm[f[3'b101]] results in f[Times[Derivative[1][2], b101]].

I tried to "control the evaluation" using \$PreRead and \$Pre.  I observed that  Mathematica replaces the single-quote with Derivative sometime between \$PreRead and \$Pre.  The closest I got to the solution is that I've managed to assign \$PreRead a purefunction that will convert f[3'b101] to f["3'b101"].  (With 3'b101 as a string, Mathematica will not convert to Derivative.) But then, how do I set \$Post to convert f["3'b101"] to f[3'b101]?

Does anyone know how to set Mathematica to avoid replacing single-quote with a Derivative under special circumstances?

Thanks,
Lawrence

```

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